Patent Document 1 discloses a technique in which after surface structures such as transistors are formed on a surface of an FZ wafer, a back surface of the wafer is ground. This grinding makes a central portion of the back surface of the wafer thinner than an outer peripheral portion. Thus, a rib portion is formed on an outer peripheral portion of the back surface of the wafer. The ground wafer is subjected to processes such as ion implantation and metal electrode film formation.